First, thank you Xilinx for having good documentation that is accessible by everyone! I mean it, I know it's standard practice for FPGA vendors, but that's often not the case for EDA vendors, and Vivado HLS is from a former EDA vendor (AutoESL, that Xilinx acquired). So I went on and read the 453-page User Guide for Vivado Design Suite High-Level Synthesis. Note that I still find a bit confusing that Vivado Design Suite designates both the design environment (replacement of ISE) and the HLS tool; maybe it's an attempt to trick customers into trying HLS where they otherwise would not, I'm not sure. Anyway, on to the review!
To sum up, based on their documentation, Vivado HLS seems quite good to me as far as C-based HLS goes. I'm only talking about the technology itself, not the tool (this is another story). I'm listing here the points I found most interesting or relevant for designers interested in higher-level languages.
1. support for three input languages complicates things. Vivado HLS supports C, C++, and SystemC. It's a choice, although in my opinion it doesn't make anybody's life easier. The documentation contains language-specific information disseminated in several sections. Some directives are supported when using C and C++ but not when using SystemC; certain features are specific to C, but do not apply to C++ or SystemC, etc. This leads me to the next point:
2. for bit-accurate code, preferably use C++, or SystemC if you must, but avoid C. If you use bit-accurate types (which is highly probable since you are designing hardware), you cannot compile your C code with a standard C compiler, and must use "apcc" instead (and won't be able to debug anymore by the way). Hmm, given that the single most often cited argument for choosing C-based HLS is the ability to use C, this is a bit of a problem. There is no such restriction with C++ or SystemC, but with these languages you cannot use
int/uint, you have to use
sc types. Also, if you need bigger types (like bigger than 64 bits), SystemC requires you to use
sc_bigint. Another limitation is that C's type system is a poor match for Vivado's bit-accurate types, and you need a lot more casts than you'd expect, which makes it even worse than Verilog in my opinion.
3. Vivado HLS suffers from the usual limitations of using C/C++ to write hardware. This is why I said that it's good "as far as C-based HLS goes". Because the input is C-based (C or C++), it inherits the decades-old quirks of the C language: you must declare your arrays as
static, you should not use global variables (but you can if you want to). You can enjoy C++ slightly unreadable templates and virtual functions and whatnot under certain restrictions. Another C-related weirdness is that you are expected to use pointers to output data, which doesn't make a lot of sense. And of course as usual with sequential programming languages, you have very limited concurrency support (at the function level). For these last two reasons only, I'd say go with SystemC if it weren't so verbose and clumsy to use.
That's it for my review of Vivado HLS. :-)